Senior ASIC Verification & FPGA Design Lead
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Synopsys, Inc.
Porto
A leading technology firm in Porto is seeking an experienced verification engineer to enhance the performance of high-speed interface products. Strong expertise in FPGA design, Verilog, and MATLAB is required for this role. Candidates should be excellent communicators and problem solvers who thrive in collaborative environments. The company offers a comprehensive range of health, wellness, and... |
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22 horas atrás
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